Abstract

This work proposes a potentiostat design with low noise, high linearity, and low power consumption capabilities for implantable biomedical sensor applications. This work is novel in that it combines three techniques: a current mirror-based topology, a chopper stabilization, and a relaxation circuit. All circuits in the design operate on 0.13 μm standard CMOS technology, utilizing a single 1.2 V power supply. The current mirror-based potentiostat mirrors the current to the frequency converter in an RC relaxation oscillator. The period between pulses inversely affects current. Using simulation software, the current was adjusted from 29.8nA to 2.83μA, inversely proportional to altering the working electrode resistance from 100kΩ to 10MΩ. Output frequencies ranged from 470.10 kHz to 27.43 MHz. The simulated results revealed that the mirrored sensing current was accurate with a 0.02 % deviation. The chopper stabilization was combined to regulate the potential using a negative feedback loop that was able to decrease noise by about 18.20 % at the observed frequency of 1 Hz. It was minimized at low frequency while the system stability increased. The overall power consumption of all circuits was less than 42.56 µW. As a result, this designed potentiostat is a promising candidate for implantable sensor applications.